1. Field of the Invention
The subject invention pertains to the field of gallium arsenide semiconductors and more particularly to a method for fabricating gallium arsenide circuits or devices using vapor phase epitaxy.
2. Description of the Prior Art
In the fabrication of semiconductor devices on semi-insulating gallium arsenide (GaAs) substrates, it is necessary to selectively include active regions on the semi-insulating substrate. One method for doing so, known in the art, utilizes ion implantation of the appropriate donor or acceptor species into the gallium arsenide substrate. The ion implanted areas are then activated by a post implant, high temperature annealing process. The annealing process takes place at a temperature of 800.degree. to 900.degree. C. for a period of 15 to 30 minutes. Since the semi-insulating substrates often contain defects in the form of dislocations in the crystalline lattice, the implanted substrates are subjected to a preselection procedure. The rejection rate of such substrates may be as high as 70 percent.
Furthermore, the depth of an active area formed by ion beam implantation using current techniques is limited to approximately 0.5 microns, which is inadequate for many devices. Additionally, the degree of doping available with ion beam implantation is limited to the range of 10.sup.17 to 10.sup.18 e.sup.- /cm.sup.3. Metallization of such areas will not result in ohmic contacts without resort to high temperature alloying techniques.
In another method of active area formation known in the art as molecular beam epitaxy (MBE), doped gallium arsenide may be grown on a semi-insulating substrate through a mask. Molecular beam epitaxy, however, has the disadvantage of permitting substantial lateral growth as well as growth in a desired area of the substrate. In molecular beam epitaxy crystals will nucleate on the mask forming a polycrystalline deposit in addition to the desired growth on the substrate where single crystal deposits will be formed. The polycrystalline material formed on the mask may be interfere with further processing steps and hinder device performance.
The present invention provides a method for fabricating gallium arsenide semiconductors having the high carrier mobility and low dislocation density that vapor phase epitaxial (VPE) gallium arsenide offers along with the excellent isolation available from chromium doped gallium arsenide, pure undoped gallium arsenide, or other suitable semi-insulating substrates. The method also permits the fabrication of ohmic contacts without the need to resort to a high temperature alloying step and the greater depth of active area that vapor phase epitaxially grown gallium arsenide can provide.